Analysis of Energy Efficient Two Level Cache Using Counting Bloom Filter

Abstract

The microprocessor system’s Caches consume much of a power and energy consumption. In this paper, a set associative cache system and way tagged L2 cache and way tagged L2 cache with counting bloom filter caches are compared. The tagged cache beyond continue the method tag of level two cache in the level one cache for the duration of understand writing process, this process prepare level two cache towards operate within a corresponding map in absolute process in the time of write hits that results in mainstream of the level two cache access. Here CBFs are proposed in the way tagged L2 cache to recover the energy and swiftness of membership tests by maintain a vague and compact demonstration of a large set to be searched. Designs were developed using behavioural VHDL and synthesized in Xilinx 8.1 Spartan 2E device. Experimental results were showing that the future way tagged L2 cache with CBF consumes lesser 50% of power than the set associative cache systems.

Keywords: CBF, Energy and power, Set associative cache, Way tagged L2 cache.

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