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A Low Power DBI Based CRC Design Using GDI Technology

International Journal of Research in Signal Processing, Computing & Communication System Design

Volume 3 Issue 2

Published: 2017
Author(s) Name: L. Babitha, Ch. Vandana, M. Swathi, U. Gnaneshwara Chary | Author(s) Affiliation: Asst. Prof., Dept. of ECE, B. V. Raju Institute of Technology, Narsapur, Andhra Pradesh, India.
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Abstract

In this paper, we implemented the data bus inversion cyclic redundancy check using Gate Diffusion input technique. Initially to reduce signaling power in the single-ended interface Data Bus Inversion (DBI) is required, in which the state of the data to be transmitted may or may not be inverted prior to transmission. a new CRC methodology which is based on the DBI is to reduce the CRC calculation delay time and area overhead for high-speed memory devices. GDI logic is introduced as an alternative to CMOS logic. It is a low power design technique which offers the implementation of the logic function with fewer numbers of transistors. GDI gates provide reduced voltage swing at their outputs. In GDI based CRC no of transistors are reduced and power consumption and area is decreased.

Keywords: Cyclick redundency check, Data bus inversion, Gate diffusion input.

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