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Design and Analysis of High Performance and Low Power Current Mode Logic CMOS

International Journal of Research in Signal Processing, Computing & Communication System Design

Volume 1 Issue 2

Published: 2015
Author(s) Name: A. Rajesh, B. L. Raju, K. Chenna Kesava Reddy | Author(s) Affiliation:
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Abstract

With the scaling down of CMOS transistors, many issues, once considered negligible, now have become a factor in design. Some of these problems are leakage current and power consumption. The solution this paper will address is using current mode logic as opposed to traditional voltages. We also begin by analyzing 180nm MOSFETs and will continue to work down to lower channel lengths. MOS Current-Mode Logic (MCML) is an alternative logic designing style that provides true differential operation, low noise level generation and noise immunity.

Keywords: N.A.

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