Tools for Architecture Configuration & Synthesis using FPGA in Embedded System

Abstract

In the present high-performance computing environment, embedded systems face many challenges, due to availability of several classes of modern high performance applications. They are demanding very high performance from system with minimum resource. Reconfigurable computing system is emerging technology as an important for system design for present and future computation environment which fulfill the requirement of application in the area of flexibility and performance. In this paper, we discuss the tools for dynamic runtime architecture configuration and synthesis in Embedded System by using reconfigurable computing devices like FPGA. High performance with limited resources needs applicationspecific architectures (ASIC), while flexibility requires adaptive capabilities. Reconfigurable computing devices promise to meet both needs i.e. flexibility and performance. Reconfigurable computing using FPGAs (Field Programmable Gate Array) is emerging as an alternative to conventional ASICs (Application Specific Integration circuit) and general purpose processors We identified some major key step in embedded system design using reconfigurable computing as system hardware and software partitioning, architecture synthesis analysis, application synthesis analyses, different reconfigurable method tool, libraries, compilation & scheduling of process/task, use of FPGA and some other programmable devices in designing of reconfigurable computing system, and the state-of-the art of ESs . While these devices & tools are currently available but the issue is, how to use these tools. Finally, in this paper, we try to solve some of above design issue tools and method for dynamic runtime architecture configuration and synthesis using FPGA in Embedded System. Keywords : Reconfigurable Computing, ASIC, FPGA, HW/SW synthesis, Dynamic Reconfiguration.

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