Friday, 20 Sep, 2019

011-28082485

011-47044510

+91-9899775880

Two Stage CMOS Operational Amplifier: Analysis and Design

Mody University International Journal of Computing and Engineering Research

Volume 3 Issue 1

Published: 2019
Author(s) Name: Shruti Suman | Author(s) Affiliation: Dept. of Electronics & Commun. Engg., Koneru Lakshmaiah Edun. Foundation (Formerly K L Univ.), A.P.
Locked Subscribed Available for All

Abstract

This paper describes analysis and design of 2-stage CMOS operational amplifier (Op Amp). The designed circuit operates at 3.3 V of supply voltage and at tsmc 0.35 µm CMOS technology. The performance parameters such as: gain, phase margin, GBW, ICMR, Slew Rate, Offset, CMRR, output swing etc. also have been analyzed after simulation which is carried out using Cadence Virtuoso Tool. The Op-Amp is designed to display a unity gain frequency of 7.85 MHz and exhibits a gain of 86.23 dB with a 49° phase margin. Obtained results also agree with theoretical predictions.

Keywords: Scaling and differential amplifier, Stability, Two stage operational amplifier.

View PDF

Refund policy | Privacy policy | Copyright Information | Contact Us | Feedback © Publishingindia.com, All rights reserved